Crt display system with circle drawing

ABSTRACT

A display system of the CRT type wherein a desired curved line is produced from signals representing the co-ordinates of points spaced along the lengths of the lines to be displayed including means for generating signals representing the co-ordinates of points spaced along the lengths of a succession of adjoining straight lines each of which is of a predetermined length and at a predetermined angle such that the display produced from said signals approximates to a desired curved line. In a particular arrangement the display produced is a many-sided polygon and thus approximates to a circle.

United States Patent [191 Machin et a1.

[451 Sept. 25, law

CRT DISPLAY SYSTEM WITH CIRCLE DRAWING Inventors: James Robert Machin,Maidstone;

John Matthew Colston, Gravesend; David John Jibb, Chatham, all ofConverter 3,609,443 9/1971 Manber 340/324 AD X 3,637,997 1/1972 Peterson 315/18 X 3,649,819 3/1972 Waller 315/18 X 3,659,283 4/1972 Ophir340/324 AD 3,660,833 5/1972 Blejwas, Jr. et a1 315/22 X PrimaryExaminerBenjamin R. Padgett Assistant Examiner-P. A. NelsonAtl0rneyMOrriS Kirschstein et a1.

[57] ABSTRACT A display system of the CRT type wherein a desired curvedline is produced from signals representing the co-ordinates of pointsspaced along the lengths of the lines to be displayed including meansfor generating signals representing the co-ordinates of points spacedalong the lengths of a succession of adjoining straight lines each ofwhich is ofa predetermined length and at a predetermined angle such thatthe display produced from said signals approximates to a desired curvedline. In a particular arrangement the display produced is a many-sidedpolygon and thus approximates to a circle.

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Address r F Eircuiirg Mama u Side Counter -54-5 PATENTEI] SEP 2 5 I975SHEET 8 CF 2 pulsemngm nrmiCivcu'n Hm Flap Fwd Scan 4% fienemmr 30Llnescan Generator XCounrer flsc'lllafor Sgnch. Source tomparator- L 39Lina (Y) Counter 3 6 Adder compfraror 33 Subrracror tounrer X I 1 Y2 3;!Counter Subtradnr 15 3 Register Timing -35 k Reglfirer Circuir 0 H, ReadOnlg Fizz ROM Memorq CRT DISPLAY SYSTEM WITH CIRCLE DRAWING The presentinvention relates to display systems of the CRT (cathode ray tube) typein which a DDA (digital differential analyzer) technique is used fordefining the lines to be displayed.

By a display system of the CRT type is meant a display system using forits display device a conventional CRT or any other display devicecapable of producing a display equivalent to that produced by aconventional CRT, for example, a solid state matrix display device.

With the DDA technique, the lines to be displayed are produced fromsignals representing the coordinates of points spaced along the lengthsof the lines.

In a typical DDA arrangement two digital registers (X and Y registers)are used, one for the X displacement and one for the Y displacement,each feeding a respective digital-to-analog converter. The X and Yregisters are each constructed as adders, and have increments dx and dyadded into them at regular intervals, so that their contents define asuccession of points forming the line to be displayed. The incrementsare normally chosen so that the sum of their squares is constant (thusensuring equal spacing of the points and hence uniform brightness forthe line), their ratio being the instantaneous slope of the line.

For drawing straight lines, the increments dx and dy' are of courseconstant, whilst for curved lines increments dx and dy must be varied.In known systems this is achieved by noting that the required incrementsare proportional to certain trigonometrical functions. For example, inthe case ofa circle the required increments are proportional to sin 6and cos respectively, where 0 increases by a small constant for eachsuccessive point on the circle; each of these is proportional to theintegral of the other (with a sign reversal in one case), and theincrements dx and cly can therefore be varied continuously byinterconnecting the two increment registers in a double integratingloop.

We have found, however, that such a system suffers from variousdisadvantages. For example, in the case of a circle one drawback is thatin the most natural implementation, the quantity which defines theradius of the circle is proportional to the reciprocal of the radius.Thus to draw a series of circles with constantly increasing radii, aseries of reciprocals has to be calculated; and the spacing betweenlarge circles will be inconveniently large. Another drawback is that theintegrating loop will involve rounding errors. This means that a circlemay not join up exactly, and its size and centre will vary in anapparently irregular and unpredictable manner.

It is an object of the present invention to provide a display system ofthe kind referred to above wherein these drawbacks are overcome.

According to the present invention a display system of the CRT type inwhich the lines to be displayed are produced from signals representingthe co-ordinates of points spaced along the lengths of the lines to bedisplayed includes means for generating signals representing theco-ordinates of points spaced along the lengths of a succession ofadjoining straight lines each of which is of a predetermined length andat a predetermined angle such that the display produced from saidsignals approximates to a desired curved line.

Preferably adjacent points in each straight line are equally spaced andcircuit means are provided for varying the number of points in aselection, which may be all, of said straight lines, thereby to vary thesize of said curved line without altering its shape.

In a preferred arrangement in accordance with the invention said displayproducing means comprises first storage means for storing in respect ofeach straight line information defining the difference in position ofadjacent points in that straight line; co-ordinate register means forholding information defining the coordinates of a point; and circuitmeans for periodically supplying information from said storage means tosaid register means so that information defining the coordinates of eachpoint in turn appears in said register means, the image produced on thescreen of the display device of the system being a representation of thepoints defined by the information appearing in said register means.

In one particular form of said preferred arrangement said circuit meanscomprises second storage means for storing information defining thedesired length of each straight line; length counting means forindicating the actual length of the straight line currently being drawn;comparator means, responsive to outputs from the second storage meansand the length counting means, for producing an output when the linecurrently being drawn is of the desired length; line counting meansresponsive to the output of said comparator, for indicating whichstraight line is currently being drawn; logic circuit means forselecting the information supplied from said first storage means to saidregister means in dependence on the count of said line counting means;and means for applying input pulses to said length counting means sothat information defining the coordinates of each point in turn appearsin said register means, in the order the points occur along said curvedline.

One particular application of a system according to the invention is forproducing a display of a circle. In such an application, the displayedstraight lines are all of substantially the same length and eachadjacent pair of lines are at the same angle to one another so as toform a substantially regular many-sided polygon so that the displayproduced from the generated signals approximates to a circle. 7

In such an arrangement the polygon preferably has an integral number ofsides in each quadrant, said first storage means stores information onlyin respect of points in which the sides in one octant of the polygon andsaid first storage means is connected to said register means via outputcircuit means for controlling the information supplied to the registermeans from said first storage means to obtain information defining theco-ordinates of the points in the sides of the other seven octants ofthe polygon in said register means.

One system in accordance with the invention will now be described, byway of example, with reference to the accompanying drawings, in which:

FIG. 1 is an overall block diagram of the system; and

FIG. 2 is a block diagram of the system modified for raster operation.

In this system the lines to be displayed are produced from signalsrepresenting the X and Y co-ordinates of points spaced along the lengthsof the lines. Referring to FIG. 1, the X and Y co-ordinates of thepoints are caused to appear in turn in main X and Y registersrespectively. Each of the main X and Y registers consists of twosections, X1 and X2 for the X register. The lower section, X1, isconstructed as a full adder and register, while the upper section, X2,is constructed as a counter. The increments dx and dy which are requiredto update periodically the numbers in the main X and Y registers areheld in increment registers DXl and DYl respectively. The increment dxis never large enough to affect the upper section X2 directly; thissection X2 is incremented only by overflows from the lower section X1.Additions of the increment dx into the register section X1 arecontrolled by a gate 11, fed with pulses on line at constant intervals.The Y register is similar, with a corresponding gate 12. The upperhalves X2 and Y2 of the X and Y registers feed respectivedigital-to-analog converters l3 and 14,-whose outputs drive the X and Ydeflection systems of a CRT 15. The above described circuits constitutethe DDA part of the system and can be used in conventional manner todraw simple straight lines symbols.

Additional circuitry for drawing circles is provided which is shown inthe lower part of FIG. 1. This circuitry controls the DDA part of thesystem to draw a many-sided polygon on the screen of the display deviceof the system approximating to a desired circle. The main elements ofthis circuitry are an 8-bit radius register R1-8, a five-bit sidecounter Sl-5, a five-bit side length counter L15, a two-bit quadrantcounter Qll-2, and a read-only memory ROM. The functions of theseelements are indicated by their names: the radius register contains aneight-bit word indicative of the radius of the desired circle, and henceof the length of the sides of the polygon, to be drawn; the side countercontains a count indicating which side of the polygon is currently beingdrawn: the side length counter contains a count indicating length of theside currently being drawn; the quadrant counter indicates which of fourquadrants of the polygon is currently being drawn; and the read-onlymemory contains the various increments dx and dy for the sides, in apermanently stored form. Consider first the operation of the system whenall sides of the polygon are to be of the same length. The side lengthis defined by five bits contained in the most significant stages, R1-5,of the radius register. The timing pulses on line 10 are fed to the sidelength counter Ll-S, whose contents are compared with the side length inR15 by a comparator 20. On equality being achieved, an output signal online 21 is fed through a gate 22 to line 23 to reset the side lengthcounter Ll5, line 23 also feeding the side counter 81-5 to increment itscount by 1. Thus the side counter S1-5 will remain at the same count forthe necessary number of timing pulses.

The side counter Sl-5 feeds logic and address circuitry 24 for theread-only memory ROM. The side counter completes a full counting cyclein each quadrant and its overflow is fed to the quadrant counter Q1-2,so that the quadrant counter is in effect an extension of two morestages to the side counter. The contents of the side counter are decodedby the circuitry 24 to select the next required location in the memoryROM, so that the new increments dx and dy can be set in the incrementregisters DX! and DYl when the next side is reached.,The signal on line23 may be used to control the timing of the operation of the memory ROM.The output of the memory ROM is fed to an output circuit 27, controlledby the outputs from the quadrant counter and the most significant stageof the side counter in a manner described later, before being suppliedto the increment registers DX] and DYl.

It will be appreciated that the radius of the circle drawn may be variedin steps corresponding to a change of one point in the length of everyside by altering the number stored in the stages R15 of the radiusregister.

The manner in which the radius of the circle may be varied inintermediate steps will now be described generally. The lower threestages R6-8 of the radius register feed a comparison logic circuit 25together with the side counter S1-5. This circuit 25 contains logiccircuitry, controlled from the radius register, which recognises certaincounts of the side counter (the counts recognized depend on the contentsof the radius register), and produces an output on line 26 for thosecounts. Line 26 feeds the gate circuit 22, and when energized, preventsthe signal from comparator 20 from passing through for one time period.This may be achieved, for example, by arranging for comparator 20 toproduce two outputs, equality and excess, gating only the first, andcombining the two. Hence, when circuit 25 produces an output theequality output of comparator 20 is blocked by gate 22 and an outputdoes not appear on line 23 until the comparator 20 produces an excessoutput. This results in events being delayed by 1 time period for thosesides for which an output signal is produced by circuit 25, so that thecorresponding side of the polygon is one point larger.

The system will now be described in more detail, for drawing polygonswith sides. The number 100 is chosen because it is a multiple of 4, andtherefore gives four identical quadrants each having an integral numberof sides, and therefore being symmetrical about the 45 line. Inaddition, with l00 sides, the ratio of radius to circumference is almostexactly 4/25, so that an increase of 1 point on each side correspondsclosely to an increase of 16 points in radius.

In a simple form of the system, the number of sides selected for anincrease of 1 point in their lengths may be any one of 8 multiples of 3from 0 to 21 in each quadrant; this is achieved by choosing one set ofthree sides, one set of six sides, and one set of 12 sides, all mutuallyexclusive, and selecting the appropriate combination of sets. By usingone extra side in the last set, however, a better approximation isachieved. It is however preferred to achieve a still betterapproximation by using one extra side in the second set in the first andthird quadrants and one extra side in the third set in the second andfourth quadrants.

The sets of three, six and 12 sides are selected by the circuitry 25under the control of the stages RtS-S of the radius register; the set ofthree sides is selected if R8 is true, the. set of six sides if R7 istrue, and the set of 12 sides if R6 is true. To understand how they areselected, the operation of the side counter must first be stated in moredetail. This counter has five stages, but'counts only 25 sides (perquadrant); seven of the normal 32 counts must therefore be deleted. Thedeleted counts are chosen to be 13 to l9, i.e. binary 01101 to 10011inclusive. The counter logic is constructed accordingly, so that count01 100 is followed by count 10100; this is achieved by recognizing thestate 011xx (where 1" indicates dont care) and using this to inhibit thenext count pulse to the bottom stage of the counter, and to enable thenext count pulse directly to the fourth stage.

The set of 3 sides per quadrant is now defined as those sides whosecounts have the pattern yylOO, where yy is not this pattern appearsthree times in the full count of 25 sides. The sets of six and 12 sidesare similarly defined as those whose counts have patterns xxxlO andxxxxl respectively, these patterns occurring six and 12 timesrespectively in the full count of 25 sides. To inset one extra side intothe first or second set depending on quadrant, the same pattern 10100 isused, using the quadrant counter outputs as well.

The details of the read-only memory and its addressing will now beconsidered more fully. As so far de scribed, the four quadrants of thepolygon are identical. It is convenient for the polygon to have verticesat the junctions between quadrants. A total of 25 pairs of incrementswill then be required for each quadrant; those for the second, third andfourth quadrants can be obtained from those for the first by merelychanging the sign of dx between vertically adjacent quadrants and of dybetween horizontally adjacent quadrants. The contents of the quadrantcounter Ql-2 is utilised by the ROM output circuit 27 to achieve this.Each quadrant, it will be further observed, is symmetrical about the 45line. Hence, the dx and dy increments for the sides 14 to 25 are thesame as the dy and dx increments sides 12 to 1 respectively; for side 13the dx and dy increments are equal. Thus only the pairs of incrementsfor the first l3 sides of a quadrant need be stored, and the incrementsfor the last 12 sides can be obtained by interchanging the dx and dyincrements for the first 12 sides. The read-only memory ROM thereforeconsists of 13 storage locations, each of which contains a pair ofincrements dx and dy. The address circuitry 24 operates to decode thecontents of the lowest four stages of the side counter Sl-S normally upto and including side 13 (count 01 100), and then to decode to thecomplement of the contents of the lowest four stages for the remainingcounts (10100 upwards to ll 1 l 1 This conversion is controlled by themost significant stage of the side counter, which is O for the first 13sides and 1 for the last 12. It is easily seen that the sum of thecounts for two corresponding sides, one in the first l2 and the other inthe last 12, is always 11111. The output circuitry 27 of the ROM iscontrolled by the quadrant counter 01-2 to insert negative signs intothe increments dx and dy in the appropriate quadrants, and by thequadrant counter and the output of the most significant stage of theside counter to interchange the increments dx and dy when required.

The position of the circle on the CRT face is determined by insertingappropriate initial values in the registers X2 and Y2.

It will be realized that, by minor modifications to the control system,it is possible to draw arcs of circles directly, without having to takethe full time required to draw a complete circle and to black out thespot for the unwanted portions.

For very small circles, of fewer than 100 points, the system may bemodified so that the side counter Sll-S counts in larger steps. Suchcircles will then be drawn with fewer than 100 sides. For example, only12 sides could be used per quadrant, of l or 2 points length asappropriate, to obtain circles down to half the size of the smallestIOO-side circle, and so on.

For large circles, more accurate radius control than described above canbe obtained by inserting one or more extra points; preferably an evennumber are introduced, in diametrically opposite sides, so that thepolygon closes up properly. This can be achieved by using the high-orderstages of the radius register, i.e. stages R11 to R4, to feed furthercircuitry in the logical circuitry 25, inserting an extra point inselected sides when the circle is large. The circuitry already discussedfor block 25 is capable of inserting extra points into a total of 22 (126 3 1) sides per quadrant; this leaves three sides of the 25 perquadrant which can have extra points inserted into them for largecircles without interfering with the normal fine adjustment of circlesize.

This technique for drawing circles is also compatible with operation ina raster mode. In this mode, the spot on the CRT face is caused to traceout a TV-type raster, and information is displayed by controlling thebrightness of the spot. it is sometimes desirable to use this mode, e.g.for displaying a TV picture, and to be able to superimpose symbolicinformation on this picture. It is therefore desirable to be able to usethe circle drawing circuitry to draw circles when the system isoperating in the raster mode. To achieve this, the system shown in FIG.2 may be used; only the parts of the system of FIG. l where modificationis required are shown in FIG. 2.

Referring to FIG. 2, a line scan generator 30 and a frame waveformgenerator 311 are provided for causing the spot on the CRT fact tofollow the TV-type raster, the lines being horizontal. The scangenerators 30 and 31 are synchronised by field and line synchronisingpulses derived from a source 32. The counter section Y2 of the Ydeflection register is initially filled with the Y co-ordinate of thetopmost point of the circle to be drawn; the X co-ordinate of this pointis stored in a separate register X0, however, instead of the countersection X2 of the X deflection register. The contents of Y2 are comparedin a comparator 33 with the Y coordinate of the line currently beingscanned, which is produced in a line counter 3d to which the linesynchronising pulses are fed, the counter 34l being reset at the end ofeach field by a field synchronising pulse. The comparator 33 controls atiming circuit 33 which generates timing pulses applied to line thetiming circuit 35 generates pulses for as long as the contents ofregister Y2 are different from the Y co-ordinate of the line currentlybeing scanned. Thus the timing pulses on line lltll will appear inbursts, each burst carrying the circle generation system forward fromthe Y co-ordinate of one raster line to the next, the system thenwaiting until the next line begins.

The contents of registers X0 and X2 are fed to an adder-subtractor 36,the X0 register contents being fed via a subtractor 37 whose purposewill be explained later, but which for the present will be ignored. Theadder-subtractor 36 is controlled by a bistable flip-flop 38 which isset at the beginning of each raster line to control the adder-subtractorto subtract the contents of X2 from the contents of X0; thus the outputof the adder-subtractor represents the X co-ordinate of the lefthandside of the circle being generated. When this difference is equal to theinstantaneous value of the X coordinate of the spot being scanned on theCRT face, as determined by a signal emitted from a comparator 39, apulse is fed to the video input to the CRT to cause the spot to bebrightened. The output of comparator 39 is also fed to the flip-flop 38to change its state; the addersubtractor 36 now forms the sum of thecontents of registers X and X2, and this sum is compared with the Xco-ordinate of the spot, a second pulse being produced by comparator 39on equality. Thus on each line of the raster, two bright-up pulses areproduced, corresponding to the two sides of the circle. The circle isthus produced by the circle generating system generating a halfcircle,with the other half being produced by, in effect, reflecting thedirectly generated half-circle in its vertical diameter. A signalrepresenting the X co-ordinate of the spot being scanned on the CRTfaceis fed to the comparator 38 from a counter 40 which counts thecycles of oscillation produced by an oscillator 41 operating undercontrol of the line synchronising pulses at a multiple of the linescanning frequency corresponding to the desired horizontal definition ofthe system.

Means (not shown) may of course by provided for inhibiting the bright-uppulses above and below the circle, to obviate the possibility of anystreaks above or below it.

As so far described, the points forming the circle will be identical andwill appear with equal vertical spacing, and thus with a spacing whichvaries around the circumference, being densest at the sides of thecircle. To produce a continuous circle of uniform brightness the lengthof the bright-up pulses and hence the corresponding points, is variedthe pulse length increasing as the space between points on the circleincreases, that is, as the angle which the side of the polygon beingdrawn makes with the horizontal decreases. For this purpose, theread-only memory ROM stores a brightup length word as well as the twoincrements dx and dy for each side of the polygon. When increments areread out, the bright-up length word is also read out on line 42 and fedto a register 43 which controls a pulse length control circuit 44, theoutput pulses from comparator 39 being fed to the circuit 414 toinitiate the bright-up pulses.

In addition, half the pulse length in register 43 is subtracted insubtractor 37 from the contents of register X0, the resultant being fedto the adder/subtractor 36. As a result, the output of comparator 39 foreach point occurs before that point, as defined by the contents of thecounter X2, by an amount equal to half the length of the bright-up pulsefor that point. Hence, the brightup pulses produce images on the CRTcentred on the points defined by the contents of the counter X2.

In an alternative arrangement (not illustrated) for obtaining a circleof uniform brightness the intensity, instead of the length, of thebright-up pulses is controlled by words stored in the read-only memoryROM. With this arrangement the output of the comparator 39 is fed to theCRT via a brightness control circuit controlled by the bright-upintensity words in the read-only memory, and the subtractor 37 is notrequired.

Although the system has been described with reference to circles, it isobvious that it can be used for any curved line symbol. It is moreconvenient to keep all the straight lines representing the curved linesymbol of equal length, to simplify the problem of varying the size ofthe curved line symbol, although it would be possible to use straightlines whose lengths were integral multiples of a standard length. Itwould also be possible, in a system which operates in conjunction with ageneral purpose digital computer, to replace the read-only memory withits permanently stored increments by a set of sub-routines stored in themain memory of the computer; the appropriate sub-routine for a desiredcurved line symbol would then be entered when required, and theincrements calculated again each time the symbol is drawn.

We claim:

1. A display system of the CRT type, in which lines to be displayed areproduced from signals representing the co-ordinates of points spacedalong the lengths of the lines to be displayed, including means forgenerating signals representing the co-ordinates of points spaced alongthe lengths of a succession of adjoining straight lines each of which isof a predetermined length and at a predetermined angle such that thedisplay produced from said signals approximates to a desired curvedline; said signal generating'means comprising:

a. first storage means for storing in respect of each straight lineinformation defining the difference in position of adjacent points inthat straight line and hence defining the angle of that line b. secondstorage means for storing information defining the desired length ofeach straight line;

0. length counting means for indicating the actual length of thestraight line currently being drawn;

d. comparator means, responsive to outputs from the second storage meansand the length counting means, for producing an output when the linecurrently being drawn is of the desired length;

e. line counting means, responsive to the output of said comparator, forindicating which straight line is currently being drawn;

f. co-ordinate register means for holding information defining theco-ordinates of a point;

g. logic circuit means for selecting and supplying information from saidfirst storage means to said register means in dependence on the count ofsaid line counting means; and

h. means for applying input pulses to said length counting means so thatinformation defining the co-ordinates of each point in turn appears insaid register means, in the order the points occur along said curvedline, the image produced on the screen of the display device of thesystem being a representation of the points defined by the informationappearing in said register means.

2. A system according to claim 1 wherein the infor- I mation stored insaid first and second storage means is such that the display producedfrom the generated signals is a substantially regular many-sided polygonand thus approximates to a circle.

3. A system according to claim 2 wherein the display produced is apolygon having an integral number of sides in each quadrant, said firststorage means stores information in respect of points in the sides inone octant of the polygon; and said first storage means is connected tosaid register means via output circuit means for controlling theinformation supplied to the register means from said first storage meansto obtain information defining the co-ordinates of the points in thesides of the other seven octants of the polygon in said register means.

4. A system according to claim 2 wherein said second storage meansstores a number defining the radius of the circle, and second logiccircuit means is provided for increasing the number of points in everyside of the polygon by the same amount in response to an increase in themore significant part of the number and for increasing the number ofpoints in a fractional selection only of the sides of the polygon inresponse to an increase in the less significant part of the number.

5. A system according to claim 1 wherein adjacent points in eachstraight line are equally spaced and second logic circuit means areprovided for varying the number of points in a selection, which may beall, of said straight lines, thereby to vary the size of said curvedline without altering its shape.

6. A system according to claim 4 wherein an increase in the number ofpoints in a side of said fractional selection is effected by delayingthe output of the comparator for that side by one input pulse period.

7. A system according to claim 4 wherein said fractional selection isdetermined by comparing said less significant part of the number storedin the second storage means and the count of said side counting means.

8. A system according to claim 1 including a deflection systemassociated with the display device and means for applying the output ofsaid signal generating means to said deflection system so as to produceimages on the screen of the display at positions corresponding to thepoints defined by the output of said signal generating means.

9. A system according to claim ll including a deflection system forscanning the screen of the display device in a raster, and means forutilizing the output of the signal generating means to brighten-upportions of the raster lines corresponding to the points defined by theoutput signal of said generating means.

10. A system according to claim 9 including means for controlling thelength of the brightened-up portions of the raster lines in dependenceon the spacing of the points defined by the output of the signalgenerating means, thereby to render each straight line image ofsubstantially the same overall brightness.

1. A display system of the CRT type, in which lines to be displayed areproduced from signals representing the co-ordinates of points spacedalong the lengths of the lines to be displayed, including means forgenerating signals representing the coordinates of points spaced alongthe lengths of a succession of adjoining straight lines each of which isof a predetermined length and at a predetermined angle such that thedisplay produced from said signals approximates to a desired curvedline; said signal generating means comprising: a. first storage meansfor storing in respect of each straight line information defining thedifference in position of adjacent points in that straight line andhence defining the angle of that line b. second storage means forstoring information defining the desired length of each straight line;c. length counting means for indicating the actual length of thestraight line currently being drawn; d. comparator means, responsive tooutputs from the second storage means and the length counting means, forproducing an output when the line currently being drawn is of thedesIred length; e. line counting means, responsive to the output of saidcomparator, for indicating which straight line is currently being drawn;f. co-ordinate register means for holding information defining theco-ordinates of a point; g. logic circuit means for selecting andsupplying information from said first storage means to said registermeans in dependence on the count of said line counting means; and h.means for applying input pulses to said length counting means so thatinformation defining the co-ordinates of each point in turn appears insaid register means, in the order the points occur along said curvedline, the image produced on the screen of the display device of thesystem being a representation of the points defined by the informationappearing in said register means.
 2. A system according to claim 1wherein the information stored in said first and second storage means issuch that the display produced from the generated signals is asubstantially regular many-sided polygon and thus approximates to acircle.
 3. A system according to claim 2 wherein the display produced isa polygon having an integral number of sides in each quadrant, saidfirst storage means stores information in respect of points in the sidesin one octant of the polygon; and said first storage means is connectedto said register means via output circuit means for controlling theinformation supplied to the register means from said first storage meansto obtain information defining the co-ordinates of the points in thesides of the other seven octants of the polygon in said register means.4. A system according to claim 2 wherein said second storage meansstores a number defining the radius of the circle, and second logiccircuit means is provided for increasing the number of points in everyside of the polygon by the same amount in response to an increase in themore significant part of the number and for increasing the number ofpoints in a fractional selection only of the sides of the polygon inresponse to an increase in the less significant part of the number.
 5. Asystem according to claim 1 wherein adjacent points in each straightline are equally spaced and second logic circuit means are provided forvarying the number of points in a selection, which may be all, of saidstraight lines, thereby to vary the size of said curved line withoutaltering its shape.
 6. A system according to claim 4 wherein an increasein the number of points in a side of said fractional selection iseffected by delaying the output of the comparator for that side by oneinput pulse period.
 7. A system according to claim 4 wherein saidfractional selection is determined by comparing said less significantpart of the number stored in the second storage means and the count ofsaid side counting means.
 8. A system according to claim 1 including adeflection system associated with the display device and means forapplying the output of said signal generating means to said deflectionsystem so as to produce images on the screen of the display at positionscorresponding to the points defined by the output of said signalgenerating means.
 9. A system according to claim 1 including adeflection system for scanning the screen of the display device in araster, and means for utilizing the output of the signal generatingmeans to brighten-up portions of the raster lines corresponding to thepoints defined by the output signal of said generating means.
 10. Asystem according to claim 9 including means for controlling the lengthof the brightened-up portions of the raster lines in dependence on thespacing of the points defined by the output of the signal generatingmeans, thereby to render each straight line image of substantially thesame overall brightness.